qoriq p1011 and p1020 communications processors overview freescale qoriq communications platforms are the next-generation evolution of our leading powerquicc communications processors. built using high-performance power architecture ? cores, qoriq platforms enable a new era of networking innovation where the reliability, security and quality of service for every connection matters. qoriq p1011 and p1020 communications processors the qoriq p1 family, which includes the p1011 and p1020 communications processors, offers the value of smart integration and efficient power for a wide variety of applications in the networking, telecom, defense and industrial markets. based on 45 nm technology for low power, the p1011 and p1020 processors provide both single- and dual-core options, from 533C800 mhz, along with advanced security and a rich set of interfaces. the p1011 and p1020 processors are ideally suited for multiservice gateways, ethernet switch controllers, wireless lan access points and high- performance general-purpose control processor applications with tight thermal constraints. the p1011 and p1020 processors are pin-compatible with the qoriq p2 platform products, offering a four-chip range of cost- effective solutions. scaling from a single core at 533 mhz (p1011) to a dual core at 1.2 ghz per core (p2020), the combined qoriq platforms offer an impressive 4.5x aggregate frequency range. the p1011 and p1020 platforms are software compatible, and both feature the e500 power architecture core and peripherals, as well as being fully software compatible with the earlier powerquicc processors. this enables customers to create a product with multiple performance points from a single board design. the p1020 dual-core processor supports both symmetric and asymmetric processing, enabling customers to further optimize their design with the same applications running on each core or serialize their application using the cores for different processing tasks. qoriq p1020 and p1011 block diagram 32 kb l1 i cache power architecture ? e500 core 32 kb l1 d cache 256 kb l 2 cache 32 kb l1 i cache power architecture e500 core 32 kb l1 d cache ddr2/ddr3 sdram controller not on p1011 coherency module system bus 4-ch. dma controller 4-ch. dma controller 2x pci express ? on-chip network on-chip network 4-lane serdes security acceleration xor duart, 2x i 2 c, timers, interrupt control, sd/mmc, spi, 2x usb 2.0/ulpi 3x gigabit ethernet enhanced local bus controller (elbc) tdm accelerators and memory control networking elements core complex (cpu, l2 and frontside corenet platform cache) basic peripherals and interconnect qoriq p1011 and p1020 block diagram p series qoriq communications platforms
freescale, the freescale logo, powerquicc and qoriq are trademarks of freescale semiconductor, inc., reg. u.s. pat. & tm. off. quicc engine and corenet are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. the power architecture and power.org word marks and the power and power.org logos and related marks are trademarks and service marks licensed by power.org. ? 2009, 2011, 2013 freescale semiconductor, inc. document number: qp10xxfs rev 6 for more information, please visit freescale.com/qoriq the p1011 and p1020 processors have an advanced set of features for ease of use. the 256 kb l2 cache offers incremental configuration to partition the cache between the two cores or to configure it as sram or stashing memory. the integrated security engine supports the cryptographic algorithms commonly used in ipsec, ssl, 3gpp and other networking and wireless security protocols. the memory controller offers future-proofing against memory technology migration with support for both ddr2 and ddr3. it also supports error correction codes, a baseline requirement for any high- reliability system. the p1011 and p1020 processors integrate a rich set of interfaces, including a 4-lane multiprotocol serdes, gigabit ethernet, pci express ? and usb. the three 10/100/1000 ethernet ports support advanced packet parsing, flow control and quality of service features, as well as ieee ? 1588 time-stampingall ideal for managing the datapath traffic between the lan and wan interface. a tdm interface can support voice for legacy phone applications. four serdes lanes can be portioned across two pci express ports and two sgmii ports. the pci express ports can provide connectivity to ieee 802.11n radio cards for wireless support. usb or sd/ mmc interfaces can be used to support local storage. a second usb interface is also available to support usb attached printers or as a console port. multiple memory connection ports are available, including the 16-bit local bus, two usb 2.0 controllers, esdhc and spi. target applications the p1011 and p1020 processors serve in a wide variety of applications. the devices are well suited for various combinations of data plane and control plane workloads in networking and telecom applications. with an available junction temperature range of C40 oc to +125 oc, the devices can be used in power- sensitive defense and industrial applications, and outdoor environments less protected from the environment. the devices primary target applications are networking and telecom linecards. a multiservice router or business gateway requires a combination of high performance and a rich set of peripherals to support the datapath throughputs and required system functionality. the p1011 and p1020 devices offer a scalable platform to develop a range of products that can support the same feature set. integrated 10/100/1000 ethernet controllers with classification and qos capabilities are ideal for managing the datapath traffic between the lan and wan interface. pci express ports can provide connectivity to ieee 802.11n radio cards for wireless support, tdm for legacy phone interfaces to support voice and the usb or sd/mmc interfaces can be used to support local storage. the second usb interface is also available to support usb-attached printers or as a console port. and the integrated security engine can provide encrypted secure communications for remote users with vpn support. technical specifications ? dual (p1020) or single (p1011) high- performance power architecture e500 cores 36-bit physical addressing double-precision floating-point support 32 kb l1 instruction cache and 32 kb l1 data cache for each core 533C800 mhz core clock frequency ? 256 kb l2 cache with ecc, also configurable as sram and stashing memory ? three 10/100/1000 mb/s enhanced three- speed ethernet controllers (etsecs) tcp/ip acceleration and classification capabilities ieee 1588 support lossless flow control rgmii, sgmii ? high-speed interfaces (not all available simultaneously) four serdes to 3.125 ghz multiplexed across controllers two pci express controllers two sgmii interfaces ? two high-speed usb controllers (usb 2.0) host and device support enhanced host controller interface (ehci) ulpi interface to phy ? enhanced secure digital host controller (esdhc) ? serial peripheral interface ? integrated security engine (sec 3.3) crypto algorithm support includes 3des, aes, rsa/ecc, md5/sha, arc4, snow 3g and fips deterministic rng single pass encryption/message authentication for common security protocols (e.g., ipsec, ssl, srtp, wimax) xor acceleration ? 32-bit ddr2/ddr3 sdram memory controller with ecc support ? programmable interrupt controller (pic) compliant with openpic standard ? four-channel dma controller ? two i 2 c controllers, duart, timers ? enhanced local bus controller (elbc) ? 16 general-purpose i/o signals ? package: 689-pin wirebond power-bga (tepbga2) qoriq p1020 and p1011 features qoriq platform device cores top core frequency l2 size ddr 2/3 support ge ports quicc engine serdes pci express serial rapidio tdm p1 p1011 1 800 mhz 256 kb 32-bit with ecc 3 4 2 n/a yes yes p1 p1020 2 800 mhz 256 kb 32-bit with ecc 3 4 2 n/a yes yes p2 p2010 1 1200 mhz 512 kb 64-bit with ecc 3 4 3 2 n/a in quicc engine p2 p2020 2 1200 mhz 512 kb 64-bit with ecc 3 4 3 2 n/a in quicc engine
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